A modern implementation of a circuit first proposed by Stanley Fifer in “Analogue Computation: Theory, Techniques & Applications”.

The core of the circuit is a basic state variable sine oscillator formed around X1 and X2 opamp integrators. U5 and U1 give voltage controlled gain which controls frequency. These devices are 4 quadrant multipliers and as such could be used for through zero frequency modulation. They do have limited dynamic range which means limited frequency response, probably 40hz to 4Khz here. These are not critical to the design and could be swapped out for exponential VCAs such as THAT2181 if LFO to 20Khz response is necessary (with a very slight adjustment). The state variable topology is based around a 360° cycle from end to end to sustain oscillation. The first integrator gives a 90° shift (270° including the inversion of the opamp), the second adds another 90°. An inversion from the second integrator adds another 180° to complete the circle and bring us to 360°, which is the same as 0°. To illustrate a point we could alternatively swap the 180° inversion with 2 integrators, but in circuit terms it doubles the component count and adds many error terms.

A state variable sine, unlike a triangle core oscillator, does not have voltage limits guaranteed by the comparator that changes direction of conrol current into an integrator. Left alone, depending on the gain/frequency settings and how they change the parasitic terms such as PCB resistance and parallel resistance across the integrator caps, the oscillation will either damp out or ascend to the rails.

The hard part of a this kind of design is therefore how to stabilize the oscillation without adding distortion. The basic feedback loop that generates the Sine has very few errors, mostly the limited phase response of opamps, and the error per cycle is only several mV or less, but unfortunately this quickly accumulates with potentially destructive results.

Examples of successful amplitude stabilization techniques include the HP8903 Distortion Analyzer which includes an onboard reference sine. In this topology, at the zero crossing of the Cosine, a sample is taken of the Sine level which will be at its positive and negative peaks. These can be compared against a reference value and the level can be adjusted accordingly.For a synthesizer, I felt this would not respond quickly enough under fast modulation. This topology was updated by Samuel Groener in published research who quoted an astonishing distortion performance of -140dBc.

A solid performance design is http://www.aes.org/e-lib/browse.cfm?elib=14135 . The most common technique in amplitude control is to clip the sine output with diodes and feed this back positively. This injects energy into the system when the output is at it’s lowest level. Zener diodes are also used to damp the circuit when it reaches it’s peak value. The baxandall configuration feeds back both in such a way as to cancel the distortion of each.

Another idea would be to use RMS level detection, although it takes several cycles to get a useable RMS value, this therefore cannot respond quickly to abrupt changes in amplitude, and also has a tendency to overcompensate and then undercompensate creating unwanted amplitude modulation.

So now we reach this idea. I was fascinated with the idea of real time control, and various ideas were considered,then discarded. I began studying trigonometric identities as a these are a set of fixed geometric rules that determine how these waves relate to each other and surely contained the key to create a way for the circuit to always know where it is versus where it should be. Here the identity Sine²** + **Cosine² = 1 is used. Rearranging to Sine²** + **Cosine² – 1 = 0 gives us real time error value as whatever 0 is, is the real time error of the circuit. This value is then multiplied by one of the integrator outputs and fed back to the integrator input to give regenerative or degenerative damping according to the real time error.** **

+10 that is fed to X3 is a precision 10 volt source. This is an earlier iteration of the circuit and there are multiple improvements that could be made for improved performance. One hint is that the optimum dynamic range of the AD633 is -/+10V. As depicted, the oscillator outputs are +/-5V, with the outputs from the multiplier scaled down to -/+2.5 (as the internal operation is to multiply X input by Y input then divide by a fixed denominator of 10V).

Have fun! The Fifer series on Analogue Computing is well worth tracking down. The oscillator section is in volume 2.

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